Applications
D-06exploratoryUnder investigation
Numerical Computing
Kernel synthesis and performance-verified transformations under the controlled generate-and-verify loop.
Current scope
Assessing whether the same verified-mutation loop can drive kernel-level transformations where the verifier is numerical equivalence plus a performance envelope.
Explicitly out of scope
- No hardware-specific compiler (CUDA/ROCm) integration is currently underway.
- Numerical stability guarantees beyond the tested envelope are not claimed.
Research strands informing this scope
Runtime verification methodology
Adds a numerical-equivalence gate alongside the existing correctness gates.
Model-substitution methodology
Cost evidence naturally extends from USD/mutation to cycles/op or joules/op.
Evidence references
Each reference links to the signed dossier for that experiment. Nothing on this page claims deployment — these are the artifacts that inform the current scope.
Open questions
- What is the acceptable numerical-equivalence tolerance per kernel class?
- How is a signed performance envelope reproduced across hardware generations?
Next milestone
Demonstrate one signed kernel transformation with a reproducible performance dossier.